From mboxrd@z Thu Jan 1 00:00:00 1970 Delivery-date: Fri, 17 Oct 2025 10:23:34 +0200 Received: from metis.whiteo.stw.pengutronix.de ([2a0a:edc0:2:b01:1d::104]) by lore.white.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1v9fkM-008kr8-0O for lore@lore.pengutronix.de; Fri, 17 Oct 2025 10:23:34 +0200 Received: from localhost ([127.0.0.1] helo=metis.whiteo.stw.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1v9fkL-0000J1-UE; Fri, 17 Oct 2025 10:23:33 +0200 Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1v9fhV-0004Kd-He; Fri, 17 Oct 2025 10:20:37 +0200 Received: from dude05.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::54]) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1v9fhV-0041lb-0I; Fri, 17 Oct 2025 10:20:37 +0200 Received: from mol by dude05.red.stw.pengutronix.de with local (Exim 4.98.2) (envelope-from ) id 1v9fhV-0000000D3S0-0BTO; Fri, 17 Oct 2025 10:20:37 +0200 From: Michael Olbrich To: ptxdist@pengutronix.de Date: Fri, 17 Oct 2025 10:20:36 +0200 Message-ID: <20251017082037.3111521-1-m.olbrich@pengutronix.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251008215609.2281909-13-s.pueschel@pengutronix.de> References: <20251008215609.2281909-13-s.pueschel@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: Re: [ptxdist] [APPLIED] libgcrypt: version bump 1.11.0 -> 1.11.2 X-BeenThere: ptxdist@pengutronix.de X-Mailman-Version: 2.1.29 Precedence: list List-Id: PTXdist Development Mailing List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: ptxdist@pengutronix.de Cc: =?UTF-8?q?Sven=20P=C3=BCschel?= Sender: "ptxdist" X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: ptxdist-bounces@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false Thanks, applied as 8cb332000697faceb337b05e19b98c64859bccf3. Michael [sent from post-receive hook] On Fri, 17 Oct 2025 10:20:36 +0200, Sven Püschel wrote: > Signed-off-by: Sven Püschel > Message-Id: <20251008215609.2281909-13-s.pueschel@pengutronix.de> > Signed-off-by: Michael Olbrich > > diff --git a/patches/libgcrypt-1.11.0/0001-mpi-ec-inline-reduce-register-pressure-on-32-bit-ARM.patch b/patches/libgcrypt-1.11.0/0001-mpi-ec-inline-reduce-register-pressure-on-32-bit-ARM.patch > deleted file mode 100644 > index 31652ee57871..000000000000 > --- a/patches/libgcrypt-1.11.0/0001-mpi-ec-inline-reduce-register-pressure-on-32-bit-ARM.patch > +++ /dev/null > @@ -1,128 +0,0 @@ > -From: Jussi Kivilinna > -Date: Sun, 4 Aug 2024 18:04:49 +0300 > -Subject: [PATCH] mpi/ec-inline: reduce register pressure on 32-bit ARM > - > -* mpi/ec-inline.h [HAVE_COMPATIBLE_GCC_ARM_PLATFORM_AS] (ADD4_LIMB32) > -(ADD6_LIMB32, SUB4_LIMB32, SUB6_LIMB32): Reuse input registers > -as output (use just two unique operators). > --- > - > -This fixes building ec-nist.c with GCC-14 on 32-bit ARM. > - > -GnuPG-bug-id: 7226 > -Signed-off-by: Jussi Kivilinna > ---- > - mpi/ec-inline.h | 63 ++++++++++++++++++++++++++++----------------------------- > - 1 file changed, 31 insertions(+), 32 deletions(-) > - > -diff --git a/mpi/ec-inline.h b/mpi/ec-inline.h > -index c24d5352f5a7..3a526246aa12 100644 > ---- a/mpi/ec-inline.h > -+++ b/mpi/ec-inline.h > -@@ -836,18 +836,18 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) > - #ifdef HAVE_COMPATIBLE_GCC_ARM_PLATFORM_AS > - > - #define ADD4_LIMB32(A3, A2, A1, A0, B3, B2, B1, B0, C3, C2, C1, C0) \ > -- __asm__ ("adds %3, %7, %11\n" \ > -- "adcs %2, %6, %10\n" \ > -- "adcs %1, %5, %9\n" \ > -- "adc %0, %4, %8\n" \ > -+ __asm__ ("adds %3, %3, %11\n" \ > -+ "adcs %2, %2, %10\n" \ > -+ "adcs %1, %1, %9\n" \ > -+ "adc %0, %0, %8\n" \ > - : "=r" (A3), \ > - "=&r" (A2), \ > - "=&r" (A1), \ > - "=&r" (A0) \ > -- : "r" ((mpi_limb_t)(B3)), \ > -- "r" ((mpi_limb_t)(B2)), \ > -- "r" ((mpi_limb_t)(B1)), \ > -- "r" ((mpi_limb_t)(B0)), \ > -+ : "0" ((mpi_limb_t)(B3)), \ > -+ "1" ((mpi_limb_t)(B2)), \ > -+ "2" ((mpi_limb_t)(B1)), \ > -+ "3" ((mpi_limb_t)(B0)), \ > - "Ir" ((mpi_limb_t)(C3)), \ > - "Ir" ((mpi_limb_t)(C2)), \ > - "Ir" ((mpi_limb_t)(C1)), \ > -@@ -857,18 +857,18 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) > - #define ADD6_LIMB32(A5, A4, A3, A2, A1, A0, B5, B4, B3, B2, B1, B0, \ > - C5, C4, C3, C2, C1, C0) do { \ > - mpi_limb_t __carry6_32; \ > -- __asm__ ("adds %3, %7, %10\n" \ > -- "adcs %2, %6, %9\n" \ > -- "adcs %1, %5, %8\n" \ > -- "adc %0, %4, %4\n" \ > -+ __asm__ ("adds %3, %3, %10\n" \ > -+ "adcs %2, %2, %9\n" \ > -+ "adcs %1, %1, %8\n" \ > -+ "adc %0, %0, %0\n" \ > - : "=r" (__carry6_32), \ > - "=&r" (A2), \ > - "=&r" (A1), \ > - "=&r" (A0) \ > -- : "r" ((mpi_limb_t)(0)), \ > -- "r" ((mpi_limb_t)(B2)), \ > -- "r" ((mpi_limb_t)(B1)), \ > -- "r" ((mpi_limb_t)(B0)), \ > -+ : "0" ((mpi_limb_t)(0)), \ > -+ "1" ((mpi_limb_t)(B2)), \ > -+ "2" ((mpi_limb_t)(B1)), \ > -+ "3" ((mpi_limb_t)(B0)), \ > - "Ir" ((mpi_limb_t)(C2)), \ > - "Ir" ((mpi_limb_t)(C1)), \ > - "Ir" ((mpi_limb_t)(C0)) \ > -@@ -878,18 +878,18 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) > - } while (0) > - > - #define SUB4_LIMB32(A3, A2, A1, A0, B3, B2, B1, B0, C3, C2, C1, C0) \ > -- __asm__ ("subs %3, %7, %11\n" \ > -- "sbcs %2, %6, %10\n" \ > -- "sbcs %1, %5, %9\n" \ > -- "sbc %0, %4, %8\n" \ > -+ __asm__ ("subs %3, %3, %11\n" \ > -+ "sbcs %2, %2, %10\n" \ > -+ "sbcs %1, %1, %9\n" \ > -+ "sbc %0, %0, %8\n" \ > - : "=r" (A3), \ > - "=&r" (A2), \ > - "=&r" (A1), \ > - "=&r" (A0) \ > -- : "r" ((mpi_limb_t)(B3)), \ > -- "r" ((mpi_limb_t)(B2)), \ > -- "r" ((mpi_limb_t)(B1)), \ > -- "r" ((mpi_limb_t)(B0)), \ > -+ : "0" ((mpi_limb_t)(B3)), \ > -+ "1" ((mpi_limb_t)(B2)), \ > -+ "2" ((mpi_limb_t)(B1)), \ > -+ "3" ((mpi_limb_t)(B0)), \ > - "Ir" ((mpi_limb_t)(C3)), \ > - "Ir" ((mpi_limb_t)(C2)), \ > - "Ir" ((mpi_limb_t)(C1)), \ > -@@ -899,18 +899,17 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) > - #define SUB6_LIMB32(A5, A4, A3, A2, A1, A0, B5, B4, B3, B2, B1, B0, \ > - C5, C4, C3, C2, C1, C0) do { \ > - mpi_limb_t __borrow6_32; \ > -- __asm__ ("subs %3, %7, %10\n" \ > -- "sbcs %2, %6, %9\n" \ > -- "sbcs %1, %5, %8\n" \ > -- "sbc %0, %4, %4\n" \ > -+ __asm__ ("subs %3, %3, %9\n" \ > -+ "sbcs %2, %2, %8\n" \ > -+ "sbcs %1, %1, %7\n" \ > -+ "sbc %0, %0, %0\n" \ > - : "=r" (__borrow6_32), \ > - "=&r" (A2), \ > - "=&r" (A1), \ > - "=&r" (A0) \ > -- : "r" ((mpi_limb_t)(0)), \ > -- "r" ((mpi_limb_t)(B2)), \ > -- "r" ((mpi_limb_t)(B1)), \ > -- "r" ((mpi_limb_t)(B0)), \ > -+ : "1" ((mpi_limb_t)(B2)), \ > -+ "2" ((mpi_limb_t)(B1)), \ > -+ "3" ((mpi_limb_t)(B0)), \ > - "Ir" ((mpi_limb_t)(C2)), \ > - "Ir" ((mpi_limb_t)(C1)), \ > - "Ir" ((mpi_limb_t)(C0)) \ > diff --git a/patches/libgcrypt-1.11.0/series b/patches/libgcrypt-1.11.0/series > deleted file mode 100644 > index 6a2ee576b03a..000000000000 > --- a/patches/libgcrypt-1.11.0/series > +++ /dev/null > @@ -1,4 +0,0 @@ > -# generated by git-ptx-patches > -#tag:base --start-number 1 > -0001-mpi-ec-inline-reduce-register-pressure-on-32-bit-ARM.patch > -# 362550fd1d4f2b16cbb102fb6bc85bfd - git-ptx-patches magic > diff --git a/rules/libgcrypt.make b/rules/libgcrypt.make > index 2d615ece40f9..360b198d10ef 100644 > --- a/rules/libgcrypt.make > +++ b/rules/libgcrypt.make > @@ -15,8 +15,8 @@ PACKAGES-$(PTXCONF_LIBGCRYPT) += libgcrypt > # > # Paths and names > # > -LIBGCRYPT_VERSION := 1.11.0 > -LIBGCRYPT_MD5 := 321c4975cfd6a496f0530b65a673f9a4 > +LIBGCRYPT_VERSION := 1.11.2 > +LIBGCRYPT_MD5 := 84ce2ad07794b987fe6341b63cf5f537 > LIBGCRYPT := libgcrypt-$(LIBGCRYPT_VERSION) > LIBGCRYPT_SUFFIX := tar.bz2 > LIBGCRYPT_URL := https://www.gnupg.org/ftp/gcrypt/libgcrypt/$(LIBGCRYPT).$(LIBGCRYPT_SUFFIX)