From: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
To: ptxdist@pengutronix.de
Subject: Re: [ptxdist] Go in ptxdist
Date: Fri, 7 Oct 2016 20:37:55 +0200 [thread overview]
Message-ID: <20161007183755.v7iz2gyvnzdcsodk@pengutronix.de> (raw)
In-Reply-To: <20161007164727.GA25453@archie.localdomain>
Hello,
On Fri, Oct 07, 2016 at 06:47:27PM +0200, Clemens Gruber wrote:
> Marc wrote that in armel, floating point values are passed via normal
> 32-bit registers (r0, r1, .. ?) instead of VFP registers (s0, s1, .. /
> d0, d1, .. ?)
>
> So I disassembled the hello world binaries..
>
> All contain single- and double-precision VFP floating point register
> accesses like the following:
> 112fc: ed932a00 vldr s4, [r3]
>
> But the first binary, built with GOARM=5, always has a branch before
> floating point instructions or floating point registers are used.
> It looks like this:
> 112fc: eb01823f bl 71c00 <_sfloat>
>
> After the jump to _sfloat there are no VFP register accesses, only
> regular integer registers and non-VFP instructions.
I only took a quick look, but there is a return in _sfloat and after
that the VFP instructions are executed. And there are no conditional
instructions that would prevent a return. So unless I'm missing
something the ARMv5 code depends on kernel support.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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next prev parent reply other threads:[~2016-10-07 18:37 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-04 15:23 Clemens Gruber
2016-10-05 13:13 ` Michael Olbrich
2016-10-05 15:55 ` Clemens Gruber
2016-10-05 16:31 ` Michael Olbrich
2016-10-05 20:42 ` Clemens Gruber
2016-10-06 9:17 ` Michael Olbrich
2016-10-07 16:47 ` Clemens Gruber
2016-10-07 18:37 ` Uwe Kleine-König [this message]
2016-10-11 16:18 ` Clemens Gruber
2016-10-12 0:07 ` Clemens Gruber
2016-10-06 6:33 ` Uwe Kleine-König
2016-10-06 10:04 ` Marc Kleine-Budde
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