From mboxrd@z Thu Jan 1 00:00:00 1970 Delivery-date: Mon, 20 Apr 2026 12:14:07 +0200 Received: from metis.whiteo.stw.pengutronix.de ([2a0a:edc0:2:b01:1d::104]) by lore.white.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1wEldn-00EIzO-10 for lore@lore.pengutronix.de; Mon, 20 Apr 2026 12:14:07 +0200 Received: from [127.0.0.1] (helo=metis.whiteo.stw.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1wEldm-0003nD-Qc; Mon, 20 Apr 2026 12:14:06 +0200 Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=[127.0.0.1]) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1wEldj-0003n3-G0; Mon, 20 Apr 2026 12:14:03 +0200 Message-ID: Date: Mon, 20 Apr 2026 12:14:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird To: Lucas Stach , distrokit@pengutronix.de References: <20260420100104.3035131-1-l.stach@pengutronix.de> <20260420100104.3035131-2-l.stach@pengutronix.de> From: Ahmad Fatoum Content-Language: en-US, de-DE, de-BE In-Reply-To: <20260420100104.3035131-2-l.stach@pengutronix.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [DistroKit] [PATCH v2 2/2] v8: kernel: update config X-BeenThere: distrokit@pengutronix.de X-Mailman-Version: 2.1.29 Precedence: list List-Id: DistroKit Mailinglist List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "DistroKit" X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: distrokit-bounces@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false On 4/20/26 12:01 PM, Lucas Stach wrote: > From: Michael Olbrich > > Most updates since the last review of the kernel config > were done by accepting the defaults for newer kernel > versions, which may not always align with what we want > as our kernel config in this BSP. > > The general ideas motivating the changes are: > - don't enable core features or workarounds for CPUs > that are not present on any of the supported SoCs > in the BSP > - disable drivers for peripherals that aren't found > on any of the supported boards in the BSP > - enable drivers for peripherals present on supported > boards or SoCs (this is best effort and has not been > checked exhaustively) > - enable hardening options when they are deemed to be > unlikely to have a substancial negative impact on > performance > > Co-developed-by: Marc Kleine-Budde > Co-developed-by: Michael Olbrich > Signed-off-by: Lucas Stach Reviewed-by: Ahmad Fatoum > -CONFIG_ARM_SCMI_QUIRKS=y > +# CONFIG_ARM_SCMI_QUIRKS is not set Interested to see if this has any noticeable effect on the BL31 blob on the Rockchip board. Cheers, Ahmad -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |